Mahsa Tahghigh

about

Bio

I am Mahsa Tahghigh, an electronic scientist and circuit design engineer, seeking for science and experiences, beyond the border of electronic and related technology. last year I have graduated with a MSc degree from Islamic Azad University of Shiraz, in Integrated Circuit Design Engineering. I conduct research in efficient and low power digital circuit design, for practical and vital applications including image processors chips. Currently my principal concentration is regarding emerging applicable techniques in digital chips such as approximate computing and quantum computations. Concurrently, approximate arithmetic circuits' simulations and their optimization methods in transistor/gate levels have fascinated me.

I live in Shiraz, where I received my BSc and MSc degrees from IAU Shiraz. Significant effort and attaining maximum grades in courses, resulting in GPA 4/4, have introduced me as a member of the Bioelectronic Integrated Circuit (Bio-IC) research lab, to follow my ideas more effectively. In this regard, my MSc thesis was about the design of digital arithmetic circuits applicable for high-performance ADC Converters. Also, since 2019, after joining the Bio-IC lab under the supervision of Dr. Shiri, my serious and significant contributions in various articles are observable. I am currently working in various fields of study as a member of the lab. I also have experience in teaching specific simulators such as HSPICE.

Education background

M.Sc. Integrated Circuit Design, 2019-2021

Islamic Azad University of Shiraz, Shiraz, Iran.

Ranked third among the Electrical Engineering students based on GPA (18.90/20 or 4/4) at Islamic Azad University Of Shiraz, Iran

    Selected courses
  • • Linear Integrated Circuits (18/20)
  • • Integrated Data Converters (19/20)
  • • Laser Electronic (19.50/20
  • • Optoelectronics (20/20)
  • • Radio Frequency Integrated Circuits (19/20)
  • • Nano Electronic (18/20)

B.Sc. Electrical Engineering-Electronics, 2013-2017

Islamic Azad University of Shiraz, Shiraz, Iran.

Contact

Mahsa Tahghigh

Research

Main interests

  • Digital Arithmetic Circuits
  • Digital System Design
  • Embedded System Design
  • Approximate Computing and Theory
  • Image Processing
  • Digital Signal Processing
  • Low Power Design

Skills and Qualifications

    Tools:
  • HSPICE (Professional)
  • MATLAB (Intermediate)
  • Cadence Virtuoso Layout Suite (Intermediate)
  • Advanced Design System (ADS)
  • Proteus Design Suite (Intermediate)
  • Visio (Professional)

Mahsa Tahghigh

Publications

Peer-reviewed Journal

J1. An efficient counter-based Wallace-tree multiplier with hybrid full adder core for image blending.

Ayoub Sadeghi, Dr. Nabiollah Shiri, Mahmood Rafiee, Mahsa Tahghigh,

Frontiers of Information Technology & Electronic Engineering volume 23, pages950–965 (2022), http://dx.doi.org/10.1631/FITEE.2100432.

We present a new counter-based Wallace-tree (CBW) 8×8 multiplier. The multiplier’s counters are implemented with a new hybrid full adder (FA) cell, which is based on the transmission gate (TG) technique. The proposed FA, TG-based AND gate, and hybrid half adder (HA) generate M:3 (4≤M≤7) digital counters with the ability to save at least 50% area occupation. Simulations by 90 nm technology prove the superiority of the proposed FA and digital counters under different conditions over the state-of-the-art designs. By using the proposed cells, the CBW multiplier exhibits high driving capability, low power consumption, and high speed. The CBW multiplier has a 0.0147 mm2 die area in a pad. The post-layout extraction proves the accuracy of experimental implementation. An image blending mechanism is proposed, in which a direct interface between MATLAB and HSPICE is used to evaluate the presented CBW multiplier in image processing applications. The peak signal-to-noise ratio (PSNR) and structural similarity index metric (SSIM) are calculated as image quality parameters, and the results confirm that the presented CBW multiplier can be used as an alternative to designs in the literature.

Under preparation for Peer-reviewed Journal

S1.Mahsa Tahghigh, Dr. Nabiollah Shiri, "A New Ripple Carry Adder Structure Based on a Swing-Boosted Half Adder Concurrent Error Correction In Pipeline Analog to Digital Converters "

S2. Mahsa Tahghigh, Dr. Nabiollah Shiri, “High performance and low power Wallace tree multiplier using approximate full adder”

Mahsa Tahghigh

Academic Experience

  • Tool Instructor:
    instructor of HSPICE tool for the courses related to integrated circuits. Mainly activities were simulations and validations of arithmetic circuits such as Full Adders, Compressors, Multipliers and digital filters applicable for image processing applications (2020-Current)
  • Research Experience
    Member of Bioelectronics Integrated Circuits (Bio-IC) Lab (2020-Current)
  • Experienced in Coordination and Team Performance:
    Main Responsibilities were preparing the professors' presentations, participation in teaching the discussed topics, including `Mass Spectroscopy` and `Polarized light` for Optoelectronics course (2020-Current)